The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2016

Filed:

Oct. 12, 2012
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Winfried Bakalski, Munich, DE;

Anthony Thomas, Munich, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03H 7/38 (2006.01); H01Q 1/50 (2006.01); H01L 29/417 (2006.01); H01L 29/423 (2006.01); H01L 23/66 (2006.01); H01L 27/06 (2006.01); H01L 27/08 (2006.01); H04B 1/18 (2006.01); H04B 1/04 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H03H 7/38 (2013.01); H01L 23/66 (2013.01); H01L 27/0641 (2013.01); H01L 27/08 (2013.01); H01L 27/0808 (2013.01); H01L 29/41733 (2013.01); H01L 29/42384 (2013.01); H01L 27/1203 (2013.01); H01L 2924/0002 (2013.01); H04B 1/0458 (2013.01); H04B 1/18 (2013.01);
Abstract

An impedance matching network comprises a first and a second signal terminal and a reference potential terminal. The network further comprises a first shunt branch between the first signal terminal and the reference potential terminal, the first shunt branch comprising a variable inductive element and a first capacitive element. The impedance matching network also comprises a second shunt branch between the second signal terminal and the reference potential terminal and comprising a second capacitive element. A series branch between the first signal terminal and the second signal terminal comprises a third capacitive element. Optionally, the first, second, and/or third capacitive element may be implemented as a variable capacitive element. The variable capacitive element comprises a plurality of transistors, wherein a combination of off-capacitances Cof the transistors provide an overall capacitance of the variable capacitive element as a function of at least two independent transistor control signals.


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