The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2016

Filed:

May. 12, 2013
Applicants:

Lalit Mohan Singh Miyan, Distt Dhaziabad, IN;

Kumar Abhishek, Ghaziabad, IN;

Nitin Singh, New Delhi, IN;

Inventors:

Lalit Mohan Singh Miyan, Distt Dhaziabad, IN;

Kumar Abhishek, Ghaziabad, IN;

Nitin Singh, New Delhi, IN;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 3/14 (2006.01); H02M 3/157 (2006.01); H02M 3/156 (2006.01);
U.S. Cl.
CPC ...
H02M 3/157 (2013.01); H02M 2003/1566 (2013.01); Y10T 307/406 (2015.04);
Abstract

An integrated circuit includes a set of electronic circuits, a voltage regulator, and a power management module. The power management module includes a set of dummy circuits connected to the set of electronic circuits, a control signal generator, a counter and a shift register. The control signal generator generates a control signal based on the current consumption of the set of electronic circuits dropping below a threshold value over a predefined period of time. The counter generates a count signal for a predetermined time period when the control signal is activated. The shift register receives the count signal, enables the dummy circuits when the count signal is received, and disables the dummy circuits in a daisy chain fashion during the predetermined time period.


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