The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2016

Filed:

Mar. 12, 2013
Applicant:

Globalfoundries, Inc., Grand Cayman, KY;

Inventors:

Akif Sultan, Austin, TX (US);

Indradeep Sen, Austin, TX (US);

Assignee:

GLOBALFOUNDRIES, INC., Grand Cayman, KY;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 27/088 (2006.01); H01L 21/84 (2006.01); H01L 27/12 (2006.01); H01L 29/78 (2006.01); H01L 29/66 (2006.01);
U.S. Cl.
CPC ...
H01L 27/088 (2013.01); H01L 21/84 (2013.01); H01L 27/1203 (2013.01); H01L 29/7848 (2013.01); H01L 29/66636 (2013.01);
Abstract

Apparatus for semiconductor device structures and related fabrication methods are provided. A method for fabricating a semiconductor device structure on an isolated region of semiconductor material comprises forming a plurality of gate structures overlying the isolated region of semiconductor material and masking edge portions of the isolated region of semiconductor material. While the edge portions are masked, the fabrication method continues by forming recesses between gate structures of the plurality of gate structures and forming stressor regions in the recesses. The method continues by unmasking the edge portions and implanting ions of a conductivity-determining impurity type into the stressor regions and the edge portions.


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