The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2016

Filed:

Apr. 06, 2014
Applicants:

Siddi Jai Prakash, New Delhi, IN;

Kumar Abhishek, Ghaziabad, IN;

Prashant Bhargava, Gurgaon, IN;

Michael A. Stockinger, Austin, TX (US);

Inventors:

Siddi Jai Prakash, New Delhi, IN;

Kumar Abhishek, Ghaziabad, IN;

Prashant Bhargava, Gurgaon, IN;

Michael A. Stockinger, Austin, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G08B 21/00 (2006.01); G06F 21/86 (2013.01); H04Q 9/14 (2006.01); G01D 4/00 (2006.01); G01R 22/06 (2006.01);
U.S. Cl.
CPC ...
G06F 21/86 (2013.01); G01D 4/004 (2013.01); G01R 22/066 (2013.01); H04Q 9/14 (2013.01);
Abstract

A tamper detector has tamper detection logic connected to tamper detection ports through a tamper detection interface. A real-time clock (RTC) provides a clock signal and has a battery. A processor is powered by an external power supply in a powered operational mode and has a power-off mode. In a wake-up configuration, a wake-up signal on a specific I/O port awakens the external power supply from the power-off mode to supply power to the RTC and the tamper detection interface when power from the battery is unavailable. The tamper detection ports continue to function despite removal or discharge of the battery without ESD concerns. The specific I/O port optionally may be configured for passive tamper detection.


Find Patent Forward Citations

Loading…