The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 23, 2016
Filed:
Aug. 31, 2010
Feng Wang, San Diego, CA (US);
Shiqun Gu, San Diego, CA (US);
Jonghae Kim, San Diego, CA (US);
Matthew Michael Nowak, San Diego, CA (US);
Feng Wang, San Diego, CA (US);
Shiqun Gu, San Diego, CA (US);
Jonghae Kim, San Diego, CA (US);
Matthew Michael Nowak, San Diego, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
A load balancing in a multiple DRAM system comprises interleaving memory data across two or more memory channels. Access to the memory channels is controlled by memory controllers. Bus masters are coupled to the memory controllers via an interconnect system and memory requests are transmitted from the bus masters to the memory controller. If congestion is detected in a memory channel, congestion signals are generated and transmitted to the bus masters. Memory requests are accordingly withdrawn or rerouted to less congested memory channels based on the congestion signals.