The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2016

Filed:

Sep. 03, 2013
Applicant:

Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;

Inventors:

Kyung-Koo Lee, Hwaseong-si, KR;

Jin-Hong Oh, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); G06F 5/06 (2006.01); H04N 19/174 (2014.01); H04N 19/129 (2014.01); H04N 19/44 (2014.01); H04N 19/172 (2014.01); H04N 19/436 (2014.01); H04N 19/423 (2014.01); G06F 9/46 (2006.01);
U.S. Cl.
CPC ...
G06F 5/065 (2013.01); G06F 9/461 (2013.01); H04N 19/129 (2014.11); H04N 19/172 (2014.11); H04N 19/174 (2014.11); H04N 19/423 (2014.11); H04N 19/436 (2014.11); H04N 19/44 (2014.11);
Abstract

A bit stream processing device may include a virtual division memory, a stream shift buffer, a decoder circuit, and a controller. The virtual division memory may be divided into a plurality of group memory regions configured to store a plurality of stream groups in the respective group memory regions and to output a memory bit stream. The stream groups may be included in an input bit stream. The stream shift buffer is configured to receive and store the memory bit stream and output a buffer bit stream. The decoder circuit is configured to perform a decoding operation on the buffer bit stream from the stream shift buffer. The controller is configured to control operations of the virtual division memory, the stream shift buffer, and the decoder circuit.


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