The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 23, 2016

Filed:

Jan. 10, 2014
Applicant:

Canon Kabushiki Kaisha, Tokyo, JP;

Inventors:

Kenji Fujii, Yokohama, JP;

Mitsuru Chida, Yokohama, JP;

Makoto Watanabe, Yokohama, JP;

Toshiaki Kurosu, Oita, JP;

Masataka Nagai, Yokohama, JP;

Takanobu Manabe, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/44 (2006.01); B41J 2/16 (2006.01);
U.S. Cl.
CPC ...
B41J 2/1603 (2013.01); B41J 2/1626 (2013.01); B41J 2/1631 (2013.01); B41J 2/1643 (2013.01); B41J 2/1645 (2013.01);
Abstract

A process for producing a semiconductor chip having a substrate and a bump formed on the substrate including (1) forming, on a substrate, a conductor gold for plating to be a base of plating growth; (2) forming a mask for plating on the conductor gold for plating; (3) performing plating using the mask for plating to form the bump and a dummy pattern; (4) removing the mask for plating; (5) etching the conductor gold for plating; and (6) applying a shock to at least the dummy pattern. The amount of side etching of the conductor gold for plating is grasped from a state of separation of the dummy pattern due to the shock in the step (6).


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