The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2016

Filed:

Sep. 25, 2014
Applicant:

Fortinet, Inc., Sunnyvale, CA (US);

Inventors:

Xu Zhou, San Jose, CA (US);

Hongbin Lu, San Jose, CA (US);

Assignee:

Fortinet, Inc., Sunnyvale, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 3/00 (2006.01); H04L 29/08 (2006.01); G06F 15/167 (2006.01);
U.S. Cl.
CPC ...
H04L 67/2842 (2013.01); G06F 15/167 (2013.01);
Abstract

Methods and systems for improving efficiency of direct cache access (DCA) are provided. According to one embodiment, a DCA control is defined by a network Input/Output (I/O) device for an I/O device queue corresponding to a central processing unit (CPU) of a host processor. A part of an incoming packet is configured by the DCA control to be copied to a cache of the CPU. The incoming packet is parsed by the network I/O device based on one or more of packet analysis, packet protocol, header format and payload data information. The parsed incoming packet is transferred from an I/O device queue of the network I/O device to a host queue of a host memory that is operatively coupled with the host processor. The specified part of the parsed incoming packet is copied by a host controller to the cache of the CPU based on the DCA control.


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