The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2016

Filed:

Dec. 23, 2014
Applicant:

Sony Corporation, Tokyo, JP;

Inventors:

Akito Sekiya, Kanagawa, JP;

Eiichi Nakamoto, Kanagawa, JP;

Assignee:

Sony Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/06 (2006.01); H03L 7/08 (2006.01); H03K 5/1252 (2006.01);
U.S. Cl.
CPC ...
H03L 7/08 (2013.01); H03K 5/1252 (2013.01);
Abstract

A clock generation circuit includes a delay clock generation unit configured to generate a predetermined number of delay clock signals having different delay time periods for a reference clock signal; a low-speed clock generation unit configured to generate a low-speed clock signal having a lower frequency than the reference signal in accordance with a control signal that controls a phase; a control signal processing unit configured to perform, on the control signal, a quantization process for quantizing a value of the control signal into the predetermined number of discrete values and a modulation process for distributing a quantization error in the quantization process in a band of frequencies higher than a predetermined frequency; a selection unit configured to select any one of the predetermined number of delay signals in accordance with the control signal; and an output unit configured to output the low-speed signal in synchronization with the selected signal.


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