The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 16, 2016
Filed:
Dec. 14, 2012
Milan Ilic, San Jose, CA (US);
Mika Nuotio, San Jose, CA (US);
Milan Ilic, San Jose, CA (US);
Mika Nuotio, San Jose, CA (US);
EMPOWER MICRO SYSTEMS INC., Santa Clara, CA (US);
Abstract
Systems and methods are disclosed with multiple direct current (DC) voltage source inverters to supply power to an alternating current (AC) power system. The system includes a plurality of full bridge inverter stages, each having a primary node and a secondary node, each of said full bridge inverter stages having positive and negative node, each of said full bridge inverter stages having a voltage supporting device electrically connected in a parallel relationship between said positive node and said negative node and a direct current (DC) source connected between the positive and negative nodes; at least one stacked inverter phase, each stacked inverter phase having a plurality of said full bridge inverter stages, each of said full bridge inverter stages in each stacked inverter phase interconnected in a series relationship with said secondary node of one of said full bridge inverter stages connected to said primary node of another full bridge inverter, said series interconnection defining a first full bridge inverter stage and a last full bridge inverter stage, each phase having an input node at said primary node of said first full bridge inverter stage and an output node at said secondary node of said last full bridge inverter stage; a local controller coupled to each full bridge inverter stage providing the control signals to each full bridge inverter stage to output an approximate nearly sinusoidal voltage waveform; and a system controller which communicating with each local controller; the system controller generating system control signals for configuration, synchronization, activation, deactivation and operating mode selection of said local controller.