The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 16, 2016
Filed:
Dec. 24, 2013
Applicants:
Epistar Corporation, Hsinchu, TW;
Huga Optotech Inc., Taichung, TW;
Inventors:
Chih-Ching Cheng, Taichung, TW;
Tsung-Cheng Chang, Taichung, TW;
Assignees:
EPISTAR CORPORATION, Hsinchu, TW;
HUGA OPTOTECH INC., Taichung, TW;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/207 (2006.01); H01L 29/20 (2006.01); H01L 29/66 (2006.01); H01L 29/36 (2006.01); H01L 29/10 (2006.01);
U.S. Cl.
CPC ...
H01L 29/207 (2013.01); H01L 29/1075 (2013.01); H01L 29/2003 (2013.01); H01L 29/36 (2013.01); H01L 29/66431 (2013.01); H01L 29/66439 (2013.01); H01L 29/66462 (2013.01); H01L 29/778 (2013.01); H01L 29/7786 (2013.01);
Abstract
A field effect transistor (FET) disclosed herein comprising a substrate, a C-doped semiconductor layer disposed on the substrate, a channel layer disposed on the C-doped semiconductor layer, and an electron supply layer disposed on the channel layer. The FET further comprises a diffusion barrier layer disposed between the C-doped semiconductor layer and the channel layer, wherein the diffusion barrier layer contacts the channel layer directly.