The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 16, 2016
Filed:
Jul. 16, 2015
Applicant:
Lam Research Corporation, Fremont, CA (US);
Inventors:
Ananth Indrakanti, Fremont, CA (US);
Peng Wang, Clifton Park, NY (US);
Eric A. Hudson, Berkeley, CA (US);
Assignee:
Lam Research Corporation, Fremont, CA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 21/768 (2006.01); H01L 21/311 (2006.01); H01L 21/3105 (2006.01); H01L 21/67 (2006.01); H01J 37/32 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76897 (2013.01); H01J 37/32082 (2013.01); H01J 37/32449 (2013.01); H01J 37/32532 (2013.01); H01J 37/32715 (2013.01); H01L 21/31051 (2013.01); H01L 21/31116 (2013.01); H01L 21/31144 (2013.01); H01L 21/67069 (2013.01); H01L 21/76802 (2013.01); H01L 21/76819 (2013.01); H01L 21/76877 (2013.01);
Abstract
A method of etching self-aligned contact/via features in a low-k dielectric layer disposed below a hardmask, which is disposed below a planarization layer. At least one cycle is provided, where each cycle comprises thinning the planarization layer, forming a deposition layer on the hardmask and planarization layer; and etching the low-k dielectric layer masked by the deposition layer.