The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2016

Filed:

Aug. 16, 2013
Applicant:

Seagate Technology Llc, Cupertino, CA (US);

Inventors:

Thomas R. Prohofsky, Edina, MN (US);

Darren E. Johnston, Burnsville, MN (US);

Assignee:

Seagate Technology LLC, Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 29/50 (2006.01); G06F 11/10 (2006.01); G11C 16/34 (2006.01); H03M 13/05 (2006.01); H03M 13/11 (2006.01); H03M 13/15 (2006.01);
U.S. Cl.
CPC ...
G11C 29/50016 (2013.01); G06F 11/1048 (2013.01); G11C 16/3418 (2013.01); G11C 29/50004 (2013.01); H03M 13/05 (2013.01); H03M 13/1102 (2013.01); H03M 13/1515 (2013.01);
Abstract

Method and apparatus for managing data in a memory, such as a flash memory array. In accordance with some embodiments, a test pattern is written to a selected block of solid-state non-volatile memory cells. The test pattern is read from the selected block and a total number of read errors is identified. A data retention time is determined in response to the total number of read errors and an elapsed time interval between the writing of the test pattern and the reading of the test pattern. Data in a second block of the solid-state non-volatile memory cells are thereafter refreshed in relation to the determined data retention time.


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