The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 16, 2016

Filed:

Apr. 05, 2012
Applicants:

Michael Fetterman, Boxborough, MA (US);

Stewart Glenn Carlton, Madison, AL (US);

Douglas J. Hahn, Los Altos, CA (US);

Rajeshwaran Selvanesan, Milpitas, CA (US);

Shirish Gadre, Fremont, CA (US);

Steven James Heinrich, Madison, AL (US);

Inventors:

Michael Fetterman, Boxborough, MA (US);

Stewart Glenn Carlton, Madison, AL (US);

Douglas J. Hahn, Los Altos, CA (US);

Rajeshwaran Selvanesan, Milpitas, CA (US);

Shirish Gadre, Fremont, CA (US);

Steven James Heinrich, Madison, AL (US);

Assignee:

NVIDIA Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/00 (2006.01); G06F 13/28 (2006.01); G06F 9/38 (2006.01);
U.S. Cl.
CPC ...
G06F 9/3887 (2013.01); G06F 9/3851 (2013.01);
Abstract

One embodiment sets forth a technique for dynamically mapping addresses to banks of a multi-bank memory based on a bank mode. Application programs may be configured to perform read and write a memory accessing different numbers of bits per bank, e.g., 32-bits per bank, 64-bits per bank, or 128-bits per bank. On each clock cycle an access request may be received from one of the application programs and per processing thread addresses of the access request are dynamically mapped based on the bank mode to produce a set of bank addresses. The bank addresses are then used to access the multi-bank memory. Allowing different bank mappings enables each application program to avoid bank conflicts when the memory is accesses compared with using a single bank mapping for all accesses.


Find Patent Forward Citations

Loading…