The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

Jan. 21, 2014
Applicant:

Telefonaktiebolaget L M Ericsson (Publ), Stockholm, SE;

Inventor:

Ferdinando Pace, Birmensdorf, CH;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 21/00 (2006.01); H03K 23/00 (2006.01); H03K 21/10 (2006.01); H03K 23/40 (2006.01); H03K 23/54 (2006.01); H03K 23/68 (2006.01);
U.S. Cl.
CPC ...
H03K 21/10 (2013.01); H03K 23/40 (2013.01); H03K 23/54 (2013.01); H03K 23/68 (2013.01);
Abstract

A programmable high-speed frequency divider architecture is provided that is programmable to divide an input clock signal frequency by a selectable division N. The frequency divider architecture has a shift register circuit having N/2 shift register stages, connected in series when N is an even integer and trunc[N/2]+1 shift register stages when N is an odd integer. The frequency divider architecture includes a feedback logic circuit that performs a logical NAND of the output clock signal with the logical ORed result of a pre-output signal provided from a shift register stage prior to the output stage and another signal that indicates whether the selectable divisor N is odd or even.


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