The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

Mar. 21, 2012
Applicants:

Majid Pahlevaninezhad, Kingston, CA;

Praveen Jain, Kingston, CA;

Inventors:

Majid Pahlevaninezhad, Kingston, CA;

Praveen Jain, Kingston, CA;

Assignee:

CISTEL TECHNOLOGY INC., Ottawa, Ontario, CA;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H02J 7/00 (2006.01); H02J 7/02 (2006.01); H02M 1/10 (2006.01); H02M 1/42 (2007.01);
U.S. Cl.
CPC ...
H02J 7/022 (2013.01); H02M 1/10 (2013.01); H02M 1/4225 (2013.01); Y02B 40/90 (2013.01); Y02B 70/126 (2013.01);
Abstract

A control approach of adjusting the input power of a power factor correction (PFC) stage so that the output voltage (DC-link) of the input AC/DC stage to an intermediate DC voltage (DC-Bus voltage) is adjusted based on the amount of power required to charge a high energy battery is disclosed. The present invention controls the input power of the PFC instead of the DC-bus voltage as is common in conventional methods. Therefore, a very fast response compared to the conventional sluggish voltage loop can be achieved. Also, having different DC-bus voltages for different output load conditions allows the DC/DC converter to work with an optimal duty cycle for a whole range of load variations.


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