The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 2016
Filed:
Mar. 03, 2015
Semiconductor Energy Laboratory Co., Ltd., Atsugi-shi, Kanagawa-ken, JP;
Akihisa Shimomura, Isehara, JP;
Hidekazu Miyairi, Isehara, JP;
Fumito Isaka, Zama, JP;
Yasuhiro Jinbo, Atsugi, JP;
Junya Maruyama, Ebina, JP;
Semiconductor Energy Laboratory Co., Ltd., Kanagawa-ken, JP;
Abstract
It is an object to provide a method of manufacturing a crystalline silicon device and a semiconductor device in which formation of cracks in a substrate, a base protective film, and a crystalline silicon film can be suppressed. First, a layer including a semiconductor film is formed over a substrate, and is heated. A thermal expansion coefficient of the substrate is 6×10/° C. to 38×10/° C., preferably 6×10/° C. to 31.8×10/° C. Next, the layer including the semiconductor film is irradiated with a laser beam to crystallize the semiconductor film so as to form a crystalline semiconductor film. Total stress of the layer including the semiconductor film is −500 N/m to +50 N/m, preferably −150 N/m to 0 N/m after the heating step.