The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 09, 2016
Filed:
Jun. 24, 2014
Applicant:
SK Hynix Inc., Icheon, KR;
Inventor:
Jung Sam Kim, Seoul, KR;
Assignee:
SK HYNIX INC., Icheon, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 27/088 (2006.01); H01L 29/423 (2006.01);
U.S. Cl.
CPC ...
H01L 24/05 (2013.01); H01L 23/562 (2013.01); H01L 27/088 (2013.01); H01L 29/4236 (2013.01); H01L 2224/04042 (2013.01); H01L 2224/05083 (2013.01); H01L 2224/05184 (2013.01); H01L 2924/01014 (2013.01); H01L 2924/01032 (2013.01); H01L 2924/0484 (2013.01); H01L 2924/04941 (2013.01); H01L 2924/13091 (2013.01); H01L 2924/1436 (2013.01); H01L 2924/1443 (2013.01);
Abstract
A semiconductor device includes a first pad region including a plurality of first storage nodes, a second pad region neighboring the first pad region and including a plurality of second storage nodes, a coupling portion disposed between the first pad region and the second pad region, and a plate electrode disposed over the plurality of first storage nodes of the first pad region and the plurality of second storage nodes of the second pad region, and disposed in the coupling portion to interconnect the first pad region and the second pad region.