The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

Aug. 09, 2013
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Timothy R. Paaske, Cupertino, CA (US);

David S. Warren, Campbell, CA (US);

Michael J. Smith, San Francisco, CA (US);

Diarmuid P. Ross, Mountain View, CA (US);

Weihua Mao, Monte Sereno, CA (US);

Assignee:

Apple Inc., Cupertino, CA (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 29/06 (2006.01); G06F 12/14 (2006.01); H04L 9/12 (2006.01); G06F 21/60 (2013.01); G06F 21/72 (2013.01); G06F 21/85 (2013.01); G06F 21/87 (2013.01); G09C 1/00 (2006.01);
U.S. Cl.
CPC ...
G06F 12/1408 (2013.01); G06F 21/602 (2013.01); G06F 21/72 (2013.01); G06F 21/85 (2013.01); G06F 21/87 (2013.01); G09C 1/00 (2013.01); H04L 9/12 (2013.01); H04L 2209/12 (2013.01);
Abstract

In an embodiment, a peripheral interface controller may include an inline cryptographic engine which may encrypt data being sent over a peripheral interface and decrypt data received from the peripheral interface. The encryption may be transparent to the device connected to the peripheral interface that is receiving/supplying the data. In an embodiment, the peripheral interface controller is included in a system on a chip (SOC) that also includes a memory controller configured to couple to a memory. The memory may be mounted on the SOC in a chip-on-chip or package-on-package configuration. The unencrypted data may be stored in the memory for use by other parts of the SOC (e.g. processors, on-chip peripherals, etc.). The keys used for the encryption/decryption of data may remain within the SOC.


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