The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

May. 28, 2013
Applicant:

Renesas Electronics Corporation, Kawasaki-shi, Kanagawa, JP;

Inventors:

Masanori Isoda, Kawasaki, JP;

Hidehiro Fujiwara, Kawasaki, JP;

Koji Nii, Kawasaki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/26 (2006.01); G06F 3/00 (2006.01); G06F 12/00 (2006.01); G06F 11/00 (2006.01); G06F 21/44 (2013.01); G11C 5/14 (2006.01); G11C 8/20 (2006.01); G11C 11/417 (2006.01); G06F 11/22 (2006.01); G06F 21/71 (2013.01); G06F 12/14 (2006.01); G06F 21/78 (2013.01);
U.S. Cl.
CPC ...
G06F 1/26 (2013.01); G06F 21/44 (2013.01); G11C 5/14 (2013.01); G11C 8/20 (2013.01); G11C 11/417 (2013.01); G06F 11/2247 (2013.01); G06F 12/14 (2013.01); G06F 21/71 (2013.01); G06F 21/78 (2013.01); G06F 2212/1052 (2013.01);
Abstract

A semiconductor device includes an identification information generation circuit having a power supply control circuit whose output voltage is controlled by a control signal, and a memory array having a first cell power line and a second cell power line. The power supply control circuit outputs a first supply voltage and a second supply voltage to a first cell power line and a second power line, respectively, when the control signal is in a first state, and outputs an intermediate voltage to the first cell power line and the second cell power line when the control signal is in a second state.


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