The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 09, 2016

Filed:

May. 29, 2012
Applicants:

Visweswaren Sivaramakrishnan, Cupertino, CA (US);

Tirunelveli S. Ravi, Saratoga, CA (US);

Andrzej Kaszuba, San Jose, CA (US);

Bozena Kaszuba, San Jose, CA (US);

Quoc Vinh Truong, San Leandro, CA (US);

Jean R. Vatus, San Jose, CA (US);

Inventors:

Visweswaren Sivaramakrishnan, Cupertino, CA (US);

Tirunelveli S. Ravi, Saratoga, CA (US);

Andrzej Kaszuba, San Jose, CA (US);

Quoc Vinh Truong, San Leandro, CA (US);

Jean R. Vatus, San Jose, CA (US);

Assignee:

Crystal Solar, Incorporated, Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
C30B 21/02 (2006.01); C30B 29/06 (2006.01); C30B 25/16 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
C30B 29/06 (2013.01); C30B 25/165 (2013.01); H01L 21/0245 (2013.01); H01L 21/0262 (2013.01); H01L 21/02381 (2013.01); H01L 21/02513 (2013.01); H01L 21/02532 (2013.01);
Abstract

A system for depositing thin single crystal silicon wafers by epitaxial deposition in a silicon precursor depletion mode with cross-flow deposition may include: a substrate carrier with low total heat capacity, high emissivity and small volume; a lamp module with rapid heat-up, efficient heat production, and spatial control over heating; and a manifold designed for cross-flow processing. Furthermore, the substrate carrier may include heat reflectors to control heat loss from the edges of the carrier and/or heat chokes to thermally isolate the carrier from the manifolds, allowing independent temperature control of the manifolds. The carrier and substrates may be configured for deposition on both sides of the substrates—the substrates having release layers on both sides and the carriers being configured to have equal process gas flow over both surfaces of the substrate. High volume may be addressed by a deposition system comprising multiple mini-batch reactors.


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