The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2016
Filed:
Jun. 27, 2014
Roi M. Shor, Tel Aviv, IL;
Avraham D. Gal, Ra'anana, IL;
Peter Z. Rashev, Calgary, CA;
Freescale Semiconductor, Inc., Austin, TX (US);
Abstract
A method and apparatus are used to predistort input signal samples according to Volterra Series Approximation Model using one or more digital predistortion blocks () having a plurality of predistorter cells (-), each including an input multiplication stage (-) for combining absolute sample values received from an absolute sample delay line () into a first stage output, a lookup table () connected to be addressed by the first stage output for generating an LUT output, and a plurality of output multiplication stages (--) for combining the LUT output with samples received from the amplitude sample delay line () and signal sample delay line () to generate an output signal sample yfrom said predistorter cell, where the output signal samples yfrom the predistorter cells are combined at an output adder circuit () to generate one or more Volterra terms of a combined signal (y[n]).