The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2016

Filed:

Apr. 11, 2014
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Yiwu Tang, San Diego, CA (US);

Jong Min Park, San Diego, CA (US);

Serkan Sayilir, Bingol, TR;

Chiewcharn Narathong, Laguna Niguel, CA (US);

Assignee:

QUALCOMM INCORPORATED, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03L 7/099 (2006.01); H03L 7/081 (2006.01);
U.S. Cl.
CPC ...
H03L 7/099 (2013.01); H03L 7/081 (2013.01);
Abstract

Locking multiple VCOs to generate a plurality of LO frequencies, including: receiving a plurality of divided VCO feedback signals from a plurality of VCOs; receiving a reference signal multiplied by a predetermined number of the plurality of VCOs; generating and processing the predetermined number of phase differences between the multiplied reference signal and the plurality of divided VCO feedback signals in a single PLL circuit including a digital loop filter to receive and process the phase differences and generate (produce) a filter output, wherein the digital loop filter includes a plurality of delay cells equal to the predetermined number; and generating and outputting (delayed) control voltages for the plurality of VCOs based on the filter output.


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