The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2016

Filed:

Sep. 02, 2014
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Jeong-Hwan Kim, Seoul, KR;

Ki-Sul Cho, Gumi-Si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/04 (2006.01); H01L 31/0376 (2006.01); H01L 31/20 (2006.01); H01L 31/036 (2006.01); H01L 29/78 (2006.01); H01L 27/32 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7831 (2013.01); H01L 27/1222 (2013.01); H01L 27/3244 (2013.01); H01L 27/3262 (2013.01);
Abstract

The present invention provides a display device and a dual gate type thin film transistor (TFT) structure for an electronic device. According to an embodiment, the dual gate TFT structure includes a first gate electrode formed on a substrate; a semiconductor layer formed on the first gate electrode; an insulating layer formed on the semiconductor layer, and including first, second and third contact holes therein; drain and source electrodes in contact with the semiconductor layer respectively through the first and second contact holes; a passivation layer formed on the drain electrode and the source electrode, and including a fourth contact hole therein; a planarization layer formed on the passivation layer, and including a fifth contact hole therein; and a second gate electrode formed on the planarization layer, and in electrical contact with the first gate electrode through the third, fourth and fifth contact holes.


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