The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2016

Filed:

May. 22, 2013
Applicants:

Giovanni DE Micheli, Lausanne, CH;

Yusuf Leblebici, Lutry, CH;

Michele DE Marchi, Lausanne, CH;

Davide Sacchetto, Lausanne, CH;

Inventors:

Giovanni De Micheli, Lausanne, CH;

Yusuf Leblebici, Lutry, CH;

Michele De Marchi, Lausanne, CH;

Davide Sacchetto, Lausanne, CH;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 21/32 (2006.01); H01L 21/47 (2006.01); H01L 29/775 (2006.01); H01L 29/66 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/06 (2006.01); H01L 29/786 (2006.01); B82Y 10/00 (2011.01);
U.S. Cl.
CPC ...
H01L 29/775 (2013.01); B82Y 10/00 (2013.01); H01L 29/0673 (2013.01); H01L 29/42356 (2013.01); H01L 29/42392 (2013.01); H01L 29/66439 (2013.01); H01L 29/7839 (2013.01); H01L 29/78642 (2013.01); H01L 29/78696 (2013.01);
Abstract

This invention describes a novel electronic device consisting of one—or more—vertically stacked gate-all-around silicon nanowire field effect transistor (SNWFET) with two independent gate electrodes. One of the two gate electrodes, acting on the central section of the transistor channel, controls on/off behavior of the channel. The second gate, acting on the regions in proximity to the source and the drain of the transistor, defines the polarity of the devices, i.e. p or n type. The electric field of the second gate acts either at the interface of the nanowire-to-source/drain region or anywhere in close proximity to the depleted region of the SiNW body, modulating the bending of the Schottky barriers at the contacts, eventually screening one type of charge carrier to pass through the channel of the transistor. This is achieved by controlling the majority carriers passing through the transistor channel by regulating the Schottky barrier thicknesses at the source and drain contacts.


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