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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9251898 B1

PDFFull Text
Date of Patent:
Feb. 02, 2016

Filed:

Feb. 07, 2012

Method for programming nonvolatile memory element, method for initializing nonvolatile memory element, and nonvolatile memory device

Applicants:

Koji Katayama, Nara, JP;

Takeshi Takagi, Kyoto, JP;

Inventors:

Koji Katayama, Nara, JP;

Takeshi Takagi, Kyoto, JP;

Assignee:

PANASONIC INTELLECTUAL PROPERTY MANAGEMENT CO., LTD., Osaka, JP;

Attorney:

Wenderoth, Lind & Ponack, L.L.P.

Primary Examiner:

Vanthu Nguyen

Assistant Examiner:

Jerome Leboeuf

Int. Cl.
CPC ...
G11C 13/00 (2006.01); H01L 27/10 (2006.01); H01L 27/102 (2006.01); H01L 49/02 (2006.01); H01L 45/00 (2006.01); H01L 27/24 (2006.01); G11C 29/50 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0069 (2013.01); G11C 13/004 (2013.01); G11C 13/0007 (2013.01); G11C 29/50008 (2013.01); H01L 27/101 (2013.01); H01L 27/1021 (2013.01); H01L 27/2409 (2013.01); H01L 27/2418 (2013.01); H01L 28/20 (2013.01); H01L 45/1233 (2013.01); H01L 45/146 (2013.01); G11C 2013/0045 (2013.01); G11C 2013/0083 (2013.01); G11C 2213/72 (2013.01);
Abstract

A method for programming a nonvolatile memory element includes: decreasing a resistance value of a variable resistance element in an initial state, by applying an initialization voltage pulse to a series circuit in which a load resistor having a first resistance value is connected in series with the variable resistance element and a MSM diode; applying, after the decreasing, a write voltage pulse to the series circuit after the resistance value of the variable resistance element is changed to a second resistance value lower than the first resistance value; and applying, after the decreasing, an erase voltage pulse to the series circuit after the resistance value of the variable resistance element is changed to a third resistance value lower than the first resistance value.

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