The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2016
Filed:
Jul. 23, 2012
Kohichi Kajitani, Kanagawa, JP;
Hideaki Komatsu, Kanagawa, JP;
Shu Shimizu, Kanagawa, JP;
International Business Machines Corporation, Armonk, NY (US);
Abstract
System and method for achieving reproducibility of a simulation operation while reasonably keeping an operation speed. A peripheral scheduler clears completion flags of all the peripheral emulators to thereby start parallel operations thereof. Then, based on processing break timing set for the individual peripheral emulators, the peripheral scheduler finds one of the peripheral emulators which is scheduled to reach a processing break at the earliest. The found peripheral emulator is referred to as a peripheral P. In a case where a time of the processing break of the peripheral P is T, the peripheral scheduler continues execution of processor emulators and plant simulators up until a time point of the time T. The peripheral scheduler waits for setting of a completion flag of the peripheral P. In response to the setting, the peripheral scheduler performs data synchronization among the peripheral P, the processor emulators, and the plant simulators.