The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2016
Filed:
Oct. 25, 2013
Altera Corporation, San Jose, CA (US);
Michael D. Hutton, Mountain View, CA (US);
Chuck Rumbolt, Newfoundland and Labrador, CA;
Jeffrey Fox, Los Gatos, CA (US);
Herman Henry Schmidt, Palto Alto, CA (US);
Altera Corporation, San Jose, CA (US);
Abstract
A circuit designer may use computer-aided design (CAD) tools to implement an integrated circuit design. The CAD tools may include auto-pipelining capabilities to improve the performance of the integrated circuit design. Auto-pipelining may modify the number of pipeline registers in a path within a given range. A description of the integrated circuit design may include different implementation alternatives of a path each having a different number of pipeline registers, and the CAD tools may select one of these implementation alternatives. The CAD tools may further evaluate the performance of a particular implementation alternative and iteratively select a different implementation alternative until a given objective is met. The CAD tool may update a test environment according to the selected implementation alternative once the objective is met and validate the selected implementation alternative using the updated test environment.