The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2016

Filed:

Aug. 01, 2013
Applicant:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Inventors:

Kai K. Chang, Hillsborough, CA (US);

Yasuko Eckert, Kirkland, WA (US);

Gabriel H. Loh, Bellevue, WA (US);

Lisa R. Hsu, Durham, NC (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/08 (2006.01); G06F 12/12 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0848 (2013.01); G06F 12/122 (2013.01);
Abstract

A system and method for efficiently powering down banks in a cache memory for reducing power consumption. A computing system includes a cache array and a corresponding cache controller. The cache array includes multiple banks, each comprising multiple cache sets. In response to a request to power down a first bank of the multiple banks in the cache array, the cache controller selects a cache line of a given type in the first bank and determines whether a respective locality of reference for the selected cache line exceeds a threshold. If the threshold is exceeded, then the selected cache line is migrated to a second bank in the cache array. If the threshold is not exceeded, then the selected cache line is written back to lower-level memory.


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