The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 02, 2016

Filed:

Mar. 31, 2014
Applicant:

Western Digital Technologies, Inc., Irvine, CA (US);

Inventors:

Kasra Vakilinia, Los Angeles, CA (US);

Anantha Raman Krishnan, Irvine, CA (US);

Majid Nemati Anaraki, Irvine, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); G06F 11/10 (2006.01); H03M 13/11 (2006.01); H03M 13/25 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1008 (2013.01); H03M 13/1117 (2013.01); H03M 13/255 (2013.01);
Abstract

Data storage systems may include a solid-state memory array configured to store encoded data units and a controller configured to decode the encoded data units. Decoding the encoded data units may include updating a check node of a plurality of check nodes associated with a parity check matrix by identifying first and second sets of variable nodes in a plurality of variable nodes associated in the parity check matrix with the check node and constructing a trellis based on the second set of variable nodes. The trellis may be used to determine a message and, based at least in part on the message, a first set of messages to be sent from the check node to the first set of variable nodes may be determined. A second set of messages to be sent from the check node to each variable node in the second set of variable nodes also may be determined.


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