The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 02, 2016
Filed:
Oct. 07, 2013
Oracle International Corporation, Redwood City, CA (US);
Hiren D. Thacker, San Diego, CA (US);
Frankie Y. Liu, Palo Alto, CA (US);
Robert David Hopkins, II, Foster City, CA (US);
Jon Lexau, Beaverton, OR (US);
Xuezhe Zheng, San Diego, CA (US);
Guoliang Li, San Diego, CA (US);
Ivan Shubin, San Diego, CA (US);
Ronald Ho, Mountain View, CA (US);
John E. Cunningham, San Diego, CA (US);
Ashok V. Krishnamoorthy, San Diego, CA (US);
ORACLE INTERNATIONAL CORPORATION, Redwood Shore, CA (US);
Abstract
A chip package includes an optical integrated circuit (such as a hybrid integrated circuit) and an integrated circuit that are adjacent to each in the chip package. The integrated circuit includes electrical circuits, such as memory or a processor, and the optical integrated circuit communicates optical signals with very high bandwidth. Moreover, a front surface of the integrated circuit is electrically coupled to a front surface of the optical integrated circuit by a top surface of the interposer, where the top surface faces the front surface of the integrated circuit and the front surface of the optical integrated circuit. Furthermore, the integrated circuit and the optical integrated circuit may be on a same side of the interposer. By integrating the optical integrated circuit and the integrated circuit in close proximity, the chip package may facilitate improved performance compared to chip packages with electrical interconnects.