The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 9246497 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 26, 2016

Filed:

May. 23, 2014
Applicant:

Altera Corporation, San Jose, CA (US);

Inventor:

Han Hua Leong, Butterworth, MY;

Assignee:

Altera Corporation, San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/24 (2006.01); H03L 7/08 (2006.01); H03L 7/10 (2006.01);
U.S. Cl.
CPC ...
H03L 7/0807 (2013.01); H03L 7/10 (2013.01);
Abstract

Circuits and techniques for operating an integrated circuit (IC) are disclosed. A disclosed circuit includes a divider circuit that is operable to receive a first signal at a first speed and output a second signal at a second speed based on the first signal. A recovery circuit is coupled to the divider circuit. The recovery circuit is operable to determine the frequency of the second signal and is further operable to generate a first ready signal and a recovered clock signal based on the second signal. A phase aligner circuit, operable to align a phase of the second signal with a phase of the recovered clocks signal based on the first ready signal, is coupled to the recovery circuit.


Find Patent Forward Citations

Leong, Han. (2016). Integrated circuit (ic) clocking techniques (U.S. Patent No. 9246497). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9246497

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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