The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2016

Filed:

Jun. 24, 2015
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventor:

Santosh Kumar Sood, New Delhi, IN;

Assignee:

XILINX, INC., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/0175 (2006.01); H03K 19/177 (2006.01);
U.S. Cl.
CPC ...
H03K 19/017581 (2013.01); H03K 19/17704 (2013.01);
Abstract

In one example, a programmable integrated circuit (IC) includes a first logic tile in a first power domain having a first local voltage. The first logic tile includes a driver operable to use the first local voltage to output a signal having a logic-level referenced to the first local voltage. The first logic tile further includes a level-shifter coupled to receive the signal from the driver and operable to output a level-shifted signal having a logic-level referenced to a global handshaking voltage. The programmable IC further includes a second logic tile in a second power domain having a second local voltage, the second logic tile including a receiver operable to use the second local voltage to receive the level-shifted signal. The global handshaking voltage is at least as high as the first local voltage and at least as high as the second local voltage.


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