The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2016

Filed:

Mar. 07, 2014
Applicant:

Analog Devices, Inc., Norwood, MA (US);

Inventor:

Yoshinori Kusuda, San Jose, CA (US);

Assignee:

Analog Devices, Inc., Norwood, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G05F 1/10 (2006.01); H03K 17/16 (2006.01); H03M 1/66 (2006.01);
U.S. Cl.
CPC ...
H03K 17/162 (2013.01); H03M 1/66 (2013.01);
Abstract

Apparatus and methods for reducing input bias current of electronic circuits are provided herein. In certain implementations, an electronic circuit includes a first input terminal, a second input terminal, an input circuit, and a plurality of input switches including at least a first input switch and a second input switch. The first input switch is electrically connected between the first input terminal and a first input of the input circuit, the second input switch is electrically connected between the second input terminal and a second input of the input circuit, and the first and second input switches can be opened and closed using a clock signal. The electronic circuit further includes a charge compensation circuit for compensating for charge injection through the first and second input switches during transitions of the clock signal.


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