The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2016

Filed:

Feb. 12, 2014
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Young Kyu Song, San Diego, CA (US);

Yunseo Park, San Diego, CA (US);

Xiaonan Zhang, San Diego, CA (US);

Ryan David Lane, San Diego, CA (US);

Aristotele Hadjichristos, San Diego, CA (US);

Assignee:

QUALCOMM Incorporated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/08 (2006.01); H01L 49/02 (2006.01); H01L 23/00 (2006.01); H01L 23/522 (2006.01);
U.S. Cl.
CPC ...
H01L 28/10 (2013.01); H01L 23/5227 (2013.01); H01L 24/17 (2013.01); H01L 24/81 (2013.01); H01L 2224/16225 (2013.01); H01L 2924/01029 (2013.01); H01L 2924/30107 (2013.01);
Abstract

An inductor design on a wafer level package (WLP) does not need to depopulate the solder balls on the die because the solder balls form part of the inductor. One terminal on the inductor couples to the die, the other terminal couples to a single solder ball on the die, and the remaining solder balls that mechanically contact the inductor remain electrically floating. The resulting device has better inductance, direct current (DC) resistance, board-level reliability (BLR), and quality factor (Q).


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