The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2016

Filed:

Jun. 28, 2012
Applicant:

Mariam Sadaka, Austin, TX (US);

Inventor:

Mariam Sadaka, Austin, TX (US);

Assignee:

Soitec, Bernin, FR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/48 (2006.01); H01L 23/498 (2006.01); H01L 23/473 (2006.01); H01L 23/367 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 23/367 (2013.01); H01L 23/473 (2013.01); H01L 23/49822 (2013.01); H01L 24/14 (2013.01); H01L 24/16 (2013.01); H01L 2224/131 (2013.01); H01L 2224/13011 (2013.01); H01L 2224/13025 (2013.01); H01L 2224/14051 (2013.01); H01L 2224/14505 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/16227 (2013.01); H01L 2224/17519 (2013.01); H01L 2224/73204 (2013.01); H01L 2224/81191 (2013.01); H01L 2224/81203 (2013.01); H01L 2224/81815 (2013.01);
Abstract

Interposers for use in the fabrication of electronic devices include semiconductor-on-insulator structures having fluidic microchannels therein. The interposers may include a multi-layer body in which a semiconductor material is bonded to a substrate with a layer of dielectric material between the semiconductor material and the substrate. At least one fluidic microchannel may extend in a lateral direction through at least one of the layer of dielectric material and the semiconductor material. The interposers may include redistribution layers and electrical contacts on opposing sides thereof. Semiconductor structures include one or more semiconductor devices coupled with such interposers. Such interposers and semiconductor structures may be formed by fabricating a semiconductor-on-insulator type structure using a direct bonding method and defining one or more fluidic microchannels at a bonding interface during the direct bonding process.


Find Patent Forward Citations

Loading…