The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 26, 2016
Filed:
Feb. 28, 2012
Isadore T. Katz, Harvard, MA (US);
Joao M. Geada, Chelmsford, MA (US);
Leon Lafrance, Bolton, MA (US);
Ferenc Varadi, Worcester, MA (US);
Ahran Dunsmoor, Pepperell, MA (US);
James Kuzeja, Pepperell, MA (US);
Shiva Raja, Chelmsford, MA (US);
Isadore T. Katz, Harvard, MA (US);
Joao M. Geada, Chelmsford, MA (US);
Leon LaFrance, Bolton, MA (US);
Ferenc Varadi, Worcester, MA (US);
Ahran Dunsmoor, Pepperell, MA (US);
James Kuzeja, Pepperell, MA (US);
Shiva Raja, Chelmsford, MA (US);
CLK DESIGN AUTOMATION, INC., Littleton, MA (US);
Abstract
A method for timing analysis of a circuit design includes, for each group of one or more instances of a cell of a cell library in the circuit design, determining timing related data for the group according to circuit context of the group in the design. The context includes at least one of a path depth, an output load, and an input slew rate. The determined timing related data are applied to analyze the circuit design.