The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 26, 2016
Filed:
Nov. 25, 2014
Thomas Koch, Kaufering, DE;
Ilhan Hatirnaz, Munich, DE;
Michael Rohleder, Unterschleissheim, DE;
FREESCALE SEMICONDUCTOR, INC., Austin, TX (US);
Abstract
A synchronous circuit comprises a functional circuitry and one or more validation circuits for validating synchronization of the functional circuitry. The functional and the validation circuits are clocked by a clock source. Each validation circuit comprises a clock distribution network, a test signal generator, a capture cell, a test signal path from the test signal generator to the capture cell, and a verification unit. The clock distribution network applies a launch clock signal at the test signal generator and a capture clock signal at the capture cell. The test signal generator produces a bi-level test signal. The test signal path transmits the test signal to the capture cell, which generates a proof sequence by sampling the test signal. The verification unit determines whether the proof sequence is identical to the test sequence. A method of designing a synchronous circuit and method of validating a synchronous circuit are also described.