The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 2016

Filed:

Sep. 26, 2014
Applicants:

Commissariat a L'energie Atomique ET Aux Energies Alternatives, Paris, FR;

Stmicroelectronics SA, Montrouge, FR;

Stmicroelectronics (Crolles 2) Sas, Crolles, FR;

Inventors:

Sébastien Barnola, Villard-Bonnot, FR;

Yves Morand, Grenoble, FR;

Heimanu Niebojewski, Papeete, FR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 21/283 (2006.01); H01L 29/66 (2006.01); H01L 21/28 (2006.01); H01L 29/49 (2006.01);
U.S. Cl.
CPC ...
H01L 21/28008 (2013.01); H01L 21/283 (2013.01); H01L 21/28052 (2013.01); H01L 21/28123 (2013.01); H01L 29/42372 (2013.01); H01L 29/49 (2013.01); H01L 29/4933 (2013.01); H01L 29/4975 (2013.01); H01L 29/6653 (2013.01); H01L 29/66507 (2013.01); H01L 29/66545 (2013.01); H01L 29/78 (2013.01);
Abstract

A method includes making a gate stack on the surface of an active zone, including depositing a first dielectric layer; depositing a gate conductive layer; depositing a first metal layer; depositing a second metal layer; depositing a second dielectric layer; partially etching the gate stack for the formation of a gate zone on the active zone; making insulating spacers on either side of the gate zone on the active zone; making source and drain electrodes zones; making silicidation zones on the surface of the source and drain zones; etching, in the gate zone on the active zone, the second dielectric layer and the second metal layer with stopping on the first metal layer, so as to form a cavity between the insulating spacers; making a protective plug at the surface of the first metal layer of the gate zone on the active zone, where the protective plug fills the cavity.


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