The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2016

Filed:

Jan. 13, 2012
Applicants:

Shinji Maekawa, Kanagawa, JP;

Yasuyuki Arai, Kanagawa, JP;

Inventors:

Shinji Maekawa, Kanagawa, JP;

Yasuyuki Arai, Kanagawa, JP;

Assignee:

SEMICONDUCTOR ENERGY LABORATORY CO. LTD., Atsugi-shi, Kanagawa-ken, JP;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H05K 3/12 (2006.01); H01L 27/12 (2006.01); G02F 1/1362 (2006.01); H05K 3/38 (2006.01);
U.S. Cl.
CPC ...
H05K 3/1208 (2013.01); H01L 27/1285 (2013.01); H01L 27/1292 (2013.01); G02F 2001/136295 (2013.01); H05K 3/125 (2013.01); H05K 3/38 (2013.01); H05K 3/386 (2013.01); H05K 2201/0116 (2013.01); H05K 2203/013 (2013.01);
Abstract

The present invention provides a thin wiring pattern such as wiring formed by discharging a droplet. In the present invention, a porous (including microporous) substance is formed as a base film in forming pattern by using a droplet discharge method (also referred to as an ink-jetting method). One feature of a wiring substrate according to the present invention provides a porous film and a conductive layer thereon. One feature of a semiconductor device of the present invention provides a thin film transistor in which a gate electrode is formed by the conductive layer having the above-described structure.


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