The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2016

Filed:

Jun. 21, 2012
Applicants:

Masakazu Sato, Tokyo, JP;

Satoshi Nakajima, Tokyo, JP;

Kazunari Suzuki, Chiba-ken, JP;

Inventors:

Masakazu Sato, Tokyo, JP;

Satoshi Nakajima, Tokyo, JP;

Kazunari Suzuki, Chiba-ken, JP;

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H04L 12/931 (2013.01); H04L 12/709 (2013.01); H04L 29/12 (2006.01); H04W 84/18 (2009.01); H04L 12/413 (2006.01); H04L 12/741 (2013.01); H04L 29/06 (2006.01);
U.S. Cl.
CPC ...
H04L 45/245 (2013.01); H04L 12/413 (2013.01); H04L 45/745 (2013.01); H04L 49/351 (2013.01); H04L 61/2092 (2013.01); H04W 84/18 (2013.01); H04L 69/22 (2013.01); Y02B 60/33 (2013.01);
Abstract

A system and method of transmitting data across a first link aggregation formed by an intermediate switch and a downstream switch, the intermediate switch adopting a Media-Access Card (MAC)-address-based load sharing algorithm for distributing traffic among links to the downstream switch interfaced with a final destination device. The method comprises: receiving a packet having a MAC header and an IP header at an input port of an upstream switch for transmission from the upstream switch to the intermediate switch, the upstream switch and intermediate switch forming a second link aggregation; re-writing, at the upstream switch, the source MAC address of the received packet to a different source address; sending the packet through the second link aggregation to the intermediate switch, the intermediate switch implementing the load sharing algorithm for sending the packet to the downstream switch along a link through the first link aggregation to the destination device.


Find Patent Forward Citations

Loading…