The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2016

Filed:

May. 31, 2013
Applicant:

Samsung Electro-mechanics Co., Ltd., Gyeonggi-do, KR;

Inventors:

Seung Wook Park, Gyeonggi-do, KR;

Christian Romero, Gyeonggi-do, KR;

Chang Bae Lee, Gyeonggi-do, KR;

Mi Jin Park, Gyeonggi-do, KR;

Assignee:

SAMSUNG ELECTRO-MECHANICS CO., LTD., Suwon-Si, Gyeonggi-Do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L 23/498 (2006.01); H01L 21/768 (2006.01); H01L 21/48 (2006.01); H05K 3/42 (2006.01); H05K 1/11 (2006.01);
U.S. Cl.
CPC ...
H01L 23/49827 (2013.01); H01L 21/486 (2013.01); H01L 21/76877 (2013.01); H05K 1/115 (2013.01); H05K 3/42 (2013.01); H01L 2924/0002 (2013.01); H05K 1/112 (2013.01); H05K 1/113 (2013.01); H05K 2201/0959 (2013.01); H05K 2201/09481 (2013.01);
Abstract

Disclosed herein is a plug via stacked structure including: a through hole plating layer plated on a through hole inner wall and around top and bottom of a through hole at thickness t; a via plug filled in an inner space of the through hole plating layer; a circuit pattern formed over the top and bottom of the through hole plating layer and the via plug and making a thickness t' formed on the through hole plating layer thicker than a thickness t; and a stacked conductive via filled in a via hole formed on the top of the through hole and formed at thickness α from a top of the circuit pattern, wherein T≦t″+α is satisfied, T represents a sum of the thicknesses t and t′ and t″ is a thickness of a portion of the circuit pattern formed on the via plug.


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