The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2016

Filed:

Jul. 03, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Saim Ahmad Qidwai, Allen, TX (US);

Stephen Keith Heinrich-Barna, Murphy, TX (US);

William Francis Kraus, Plano, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/22 (2006.01); G11C 5/06 (2006.01); G11C 11/56 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 11/221 (2013.01); G11C 11/2273 (2013.01); G11C 5/06 (2013.01); G11C 11/22 (2013.01); G11C 11/2275 (2013.01); G11C 11/5657 (2013.01); G11C 13/004 (2013.01);
Abstract

A system on chip (SoC) may have an array ferroelectric bit cells. The array may include a plurality of bit cells organized into a plurality of rows and columns. A set of word lines is configured such that one of the plurality of word lines is connected to each bit cell in a row of bit cells. A set of column oriented platelines is provided, wherein each column of bit cells has one of the plurality of platelines connected to each bit cell in the column of bit cells. A set of bitlines is provided, wherein each column of bit cells has one of the plurality of bitlines connected to each bit cell in the column of bit cells. Multiplexors may be used to allow one plateline drivers, bitline drivers, and sense amps to be shared between multiple platelines and bitlines.


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