The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2016

Filed:

Sep. 30, 2012
Applicant:

Apple Inc., Cupertino, CA (US);

Inventors:

Guillaume A. Carbonneau, Alameda, CA (US);

Vincent Dumont, San Francisco, CA (US);

Assignee:

APPLE INC., Cupertino, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 5/00 (2006.01); G06T 11/00 (2006.01); G01C 21/32 (2006.01); G06F 17/30 (2006.01);
U.S. Cl.
CPC ...
G06T 11/00 (2013.01); G01C 21/32 (2013.01); G06F 17/30241 (2013.01);
Abstract

A method is provided that utilizes a parallel processing system to determine whether different geometries intersect each tile in a map hierarchy. The method receives a description of a geometry and an identification of a tile in a tile tree. The method utilizes an available processing unit to determine whether the geometry intersects the tile. When the geometry intersects the tile and the tile has child tiles, the method stores several task descriptions that can be assigned to any processing units in the parallel processing system. Each task description includes the description of the portion of the geometry that overlaps the tile and an identification of one of the child tiles of the tile. The method then assigns each of the tasks to an available processing unit to continue down the tree hierarchy to determine whether each child tile intersects a portion of the geometry.


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