The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 2016
Filed:
May. 30, 2012
Applicants:
Mitsuhide Miyamoto, Kawasaki, JP;
Katsumi Matsumoto, Mobara, JP;
Takahide Kuranaga, Mobara, JP;
Inventors:
Assignee:
Pixtronix, Inc., San Diego, CA (US);
Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/34 (2006.01); G02B 26/08 (2006.01); H03K 3/037 (2006.01); G11C 23/00 (2006.01);
U.S. Cl.
CPC ...
G02B 26/0841 (2013.01); G09G 3/346 (2013.01); G11C 23/00 (2013.01); H03K 3/0375 (2013.01); G09G 2300/0417 (2013.01); G09G 2300/0857 (2013.01); G09G 2310/0262 (2013.01);
Abstract
This disclosure provides novel latching circuits, and pixel circuits and display devices that include such latching circuits. The latches herein include a switch positioned on an inverter coupling interconnect which couples two cross-coupled inverters of the latch. The switch is configured to control a passage of a current between the first and second inverters. By switching the switch OFF at a time a data voltage is transferred to the inverters, any leak current between the inverters can be interrupted. As a result, a malfunctioning of the data latch is prevented.