The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2016

Filed:

Aug. 04, 2014
Applicants:

Nishant Singh Thakur, Indore, IN;

Rakesh Pandey, Ghaziabad, IN;

Manmohan Rana, Ghaziabad, IN;

Inventors:

Nishant Singh Thakur, Indore, IN;

Rakesh Pandey, Ghaziabad, IN;

Manmohan Rana, Ghaziabad, IN;

Assignee:

FREESCALE SEMICONDUCTOR,INC, Austin, TX (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 31/28 (2006.01); H03B 5/32 (2006.01);
U.S. Cl.
CPC ...
G01R 31/282 (2013.01); H03B 5/32 (2013.01);
Abstract

In an integrated circuit, a clock monitor circuit detects when an analog clock signal output by an on-chip crystal oscillator has stabilized. The clock monitor circuit uses an envelope follower circuit to monitor the envelope of the analog clock signal and compare the amplitude of the envelope with a predetermined amplitude value. When the predetermined value is reached and the envelope has remained steady for a predetermined time, an oscillator okay signal is generated. If an oscillator okay signal is not detected within another predetermined time, then an oscillator failure signal may be generated.


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