The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2016

Filed:

Nov. 08, 2011
Applicant:

Toru Inoue, Osaka, JP;

Inventor:

Toru Inoue, Osaka, JP;

Assignee:

SUMITOMO ELECTRIC INDUSTRIES, LTD., Osaka-shi, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/14 (2006.01); H04N 21/61 (2011.01); H04L 12/28 (2006.01); H04Q 11/00 (2006.01); H04B 10/27 (2013.01);
U.S. Cl.
CPC ...
H04N 21/6106 (2013.01); H04B 10/27 (2013.01); H04L 12/2885 (2013.01); H04Q 11/0067 (2013.01); H04Q 2011/0081 (2013.01);
Abstract

There is provided a technique that enables a process to be performed smoothly between two processing units of an OLT after rebooting of one of the processing units even in the case where a process by the processing unit is temporarily halted. An upper processing unit can be temporarily halted when updating firmware. A basic communication unit (lower processing unit) is configured to maintain its operation even when the upper processing unit is temporarily halted. When an event occurs during a halt period of the upper processing unit, a matching unit matches a management state stored in a first storage unit with a management state stored in a second storage unit after the halt period of the upper processing unit.


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