The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2016

Filed:

Nov. 18, 2013
Applicant:

SK Hynix Memory Solutions Inc., San Jose, CA (US);

Inventors:

Lingqi Zeng, Turlock, CA (US);

Qiuju Diao, Davis, CA (US);

Jason Bellorado, San Jose, CA (US);

Assignee:

SK Hynix Inc., Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); H03M 13/11 (2006.01); H03M 13/37 (2006.01);
U.S. Cl.
CPC ...
H03M 13/1108 (2013.01); H03M 13/1111 (2013.01); H03M 13/1117 (2013.01); H03M 13/3723 (2013.01); H03M 13/658 (2013.01);
Abstract

A first message, associated with going from one of a plurality of variable nodes to one of a plurality of check nodes is computed, wherein: (1) one or more connections between the plurality of variable nodes and the plurality of check nodes are specified by an LDPC parity check matrix and (2) a scaling constant is used to compute the first message. A second message, associated with going from one of the plurality of check nodes to one of a plurality of variable nodes, is computed, wherein the scaling constant is not used to compute the second message.


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