The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2015

Filed:

Jul. 11, 2014
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventor:

Hugh Thomas Mair, Fairview, TX (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/4763 (2006.01); H01L 21/768 (2006.01); H01L 23/522 (2006.01); H01L 23/528 (2006.01); H01L 21/78 (2006.01);
U.S. Cl.
CPC ...
H01L 21/76879 (2013.01); H01L 21/78 (2013.01); H01L 23/528 (2013.01); H01L 23/5226 (2013.01); H01L 21/768 (2013.01); H01L 2924/0002 (2013.01); H01L 2924/12044 (2013.01);
Abstract

An integrated circuit structure includes a first conductive layer (MET4) including a first forked conductive structure (), an insulating layer (, ILD45) substantially disposed over the first forked conductive structure (), a plurality of conductive vias (-) through the insulating layer (ILD45) and electrically connecting with the first forked conductive structure (), and a second conductive layer (MET5) including a second forked conductive structure () substantially disposed over at least a portion of the insulating layer (ILD45) and generally perpendicular to the first forked conductive structure (), the plurality of conductive vias (-) electrically connecting with the second forked conductive structure (). Other structures, devices, and processes are also disclosed.


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