The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2015
Filed:
Jan. 03, 2013
Applicant:
Samsung Electronics Co., Ltd., Suwon-Si, Gyeonggi-Do, KR;
Inventors:
DongHun Kwak, Hwaseong-si, KR;
Cheon-An Lee, Hwaseong-si, KR;
Assignee:
Samsung Electronics Co., Ltd., Suwon-si, Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/00 (2006.01); G11C 11/34 (2006.01); G11C 13/00 (2006.01);
U.S. Cl.
CPC ...
G11C 13/0023 (2013.01); G11C 13/0097 (2013.01); G11C 2213/71 (2013.01); G11C 2213/77 (2013.01);
Abstract
A resistive memory device that simultaneously erases memory cells connected to selected word line(s) included in an erase unit. The erase unit includes fewer word lines than are included in a memory block of the resistive memory device. However, erase verification may nonetheless be performed on a block basis.
Kwak, DongHun. (2015). Resistive memory device having defined or variable erase unit size (U.S. Patent No. 9224462). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/9224462
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile